In the semiconductor industry, devices are fabricated by a number of manufacturing processes, producing structures of an ever-decreasing size. Current demands for high density and performance associated with ultra large scale integration require formation of device features with high precision and uniformity, which in turn necessitate careful process monitoring, including frequent and detailed inspection of specimens while they are still in the form of semiconductor wafers. The term “specimen” used in this specification should be expansively construed to cover any kind of wafer, reticle and other structures, combinations and/or parts thereof used for manufacturing semiconductor integrated circuits, magnetic heads, flat panel displays, and other thin film devices.
A variety of inspection tools can be based on non-destructive observations as, by way of non-limiting example, scanning electron microscopes, atomic force microscopes, optical inspection tools, etc. Inspection is important for debugging specimen manufacturing processes, monitoring process variations, improving production yield, etc.
A conventional inspection process employs a two phase “inspection and review” procedure. During the first phase, the surface of a specimen is inspected at high-speed and relatively low-resolution. In the first phase a defect map is produced to show suspected locations on the specimen having high probability of a defect. During the second phase the suspected locations are more thoroughly analyzed. In some cases both phases can be implemented by the same inspection tool, and in some other cases these two phases are implemented by different inspection tools.
For purpose of illustration only, the following description is provided with respect to inspection of semiconductor wafers. Embodiments are, likewise, applicable to inspection of other specimens.
With some of the aforementioned inspection tools, a wafer and/or parts thereof can be inspected using die-to-die or cell-to-cell inspection. For instance, areas in a die such as the periphery regions which can comprise, for example, logic components, are best inspected using die-to-die inspection and thus, are checked for defects by comparison to one or more reference dies. However, in some other cases, cell-to-cell inspection can be desired. For example, areas that include a plurality of identical memory cells of one or more types are preferably checked using cell-to-cell inspection, since adjacent or nearby cells within the same die may be more similar than cells between adjacent dies. The similarities may be due to process conditions and/or the inspection tool itself. For instance, differences due to illumination, focus, or other optical irregularities may be less pronounced within a die as compared to between dies.
Problems of matching proper inspection algorithm with specific inspection areas have been recognized in the conventional art and various techniques have been developed to provide solutions.